1. Field of the Invention
The present invention relates to a method and an apparatus for detecting the defects of an active matrix substrate constituting a display apparatus in conjunction with a display medium such as liquid crystal and an active matrix display panel, and also relates to a method for repairing such defects as found therein.
2. Description of the Related Art
In an active matrix liquid crystal panel, pixel electrodes are arranged in a matrix fashion on an insulating substrate, and the respective pixel electrodes are independently driven by active elements (switching elements). Recently, in place of a CRT, the active matrix liquid crystal panel of this type has been practically used for various kinds of display apparatuses applicable for a liquid crystal television, a word processor, a computer, and the like. As a switching element for selectively driving each of the pixel electrodes, a thin film transistor (TFT), a metal-insulator-metal (MIM), an MOS transistor, a diode, a varistor, or the like is generally employed.
FIG. 1 is a schematic circuit diagram showing an active matrix display apparatus utilizing TFTs as the switching elements. FIG. 2 is a partially enlarged view showing the active matrix display apparatus shown in FIG. 1. This display apparatus includes: an active matrix substrate and a counter substrate which are disposed so as to be opposed to each other; and a liquid crystal layer interposed between the pair of substrates. On the active matrix substrate, a plurality of gate bus lines 1 functioning as scanning lines are provided in parallel and a plurality of source bus lines 2 functioning as signal lines are also provided in parallel so as to cross orthogonally with the gate bus lines 1. As shown in FIG. 2, in the vicinity of each of the crossings of the gate bus lines 1 and the source bus lines 2, a TFT 3 is disposed. The TFT 3 is connected to a pixel electrode 4 which is provided in a rectangular region defined by two adjacent gate bus lines 1 and two adjacent source bus lines 2. As shown in FIG. 1, spare lines 13 functioning as redundant lines of the source bus lines 2 are also provided so as to cross orthogonally with the source bus lines 2. Depending on the case, several or several tens of divided spare lines 13 are formed so as to correspond to each set of source bus lines 2. In the case where the spare lines 13 are employed in the examples of the invention to be described later, the lines 13 may be formed in the same manner.
As shown in FIG. 2, on a surface of the counter substrate which is opposed to the active matrix substrate and is in contact with the liquid crystal layer, counter electrodes 5 are formed. Between a pixel electrode 4 and a counter electrode 5 corresponding to the pixel electrode 4, a pixel capacitance (C.sub.lc) 6 is formed. A storage capacitance (C.sub.s) 7 is formed in parallel with the pixel capacitance (C.sub.lc) 6. Namely, the storage capacitance (C.sub.s) 7 is formed between the pixel electrode 4 and one of the two adjacent gate bus lines 1 interposing the pixel electrode 4. That is, the above-described active matrix substrate is constructed under a so-called Cs-on-Gate structure.
In a conventional active matrix liquid crystal display apparatus having the Cs-on-Gate structure, as shown in FIG. 3, a signal A1 is supplied to odd-numbered gate bus lines 1 and a signal A2 is supplied to even-numbered gate bus lines 1 in order to inspect the defects of the substrate. In addition, a signal B is supplied to the source bus lines 2 and a signal C is supplied to the counter electrodes 5. These signals A1 and A2 control the ON/OFF states by sequentially scanning gate electrodes of the TFTs 3. The signal B writes a signal voltage at a certain level corresponding to the image through a TFT 3 into each pixel, and maintains the voltage level until the next frame is written. The voltage of the signal C is variable between the ON voltage and the OFF voltage of the TFT 3 to be applied to the gate bus lines 1, i.e. the signal C makes the DC level variable. The signal D is supplied to the spare lines 13 on both sides.
FIG. 4 is a schematic circuit diagram showing an active matrix display apparatus including TFTs as switching elements and having a construction different from that of FIG. 1. FIG. 5 is a partially enlarged view of the active matrix display apparatus shown in FIG. 4. This display apparatus includes: an active matrix substrate and a counter substrate which are disposed so as to be opposed to each other; and a liquid crystal layer interposed between the pair of substrates. On the active matrix substrate, a plurality of gate bus lines 1 functioning as scanning lines are provided in parallel, and a plurality of source bus lines 2 functioning as signal lines are also provided in parallel so as to be orthogonally crossed with the gate bus lines 1. As shown in FIG. 5, in the vicinity of each of the crossings of the gate bus lines 1 and the source bus lines 2, a TFT 3 is disposed. The TFT 3 is connected to a pixel electrode 4 which is provided in a rectangular region defined by two adjacent gate bus lines 1 and two adjacent source bus lines 2. As shown in FIG. 4, spare lines 13 functioning as redundant lines of the source bus lines 2 are also provided so as to be orthogonally crossed with the source bus lines 2. In addition, a plurality of common lines 10 for storage capacitance are provided in parallel with the gate bus lines 1.
On a surface of the counter substrate which is opposed to the active matrix substrate and in contact with the liquid crystal layer, counter electrodes 5 are formed. Between a pixel electrode 4 and a counter electrode 5 corresponding to the pixel electrode 4, a pixel capacitance (C.sub.lc) 6 is formed. A storage capacitance (C.sub.s) 7 is formed in parallel with the pixel capacitance (C.sub.lc) 6. Namely, the storage capacitance (C.sub.s) 7 is formed between the pixel electrode 4 and a common line for storage capacitance 10. That is, the above-described active matrix substrate is constructed under a so-called Cs-on-Common structure.
In a conventional active matrix liquid crystal display apparatus under the Cs-on-Common structure, as shown in FIG. 6, a signal A3 is supplied to the gate bus lines 1 and a signal E is supplied to the common lines 10 in order to inspect the defects of the substrate. In addition, a signal B is supplied to the source bus lines 2, a signal F is supplied to the spare lines 13, and a signal C is supplied to the counter electrodes 5. The signal A3 controls the ON/OFF states by sequentially scanning gate electrodes of the TFTs 3. The signal B writes a signal voltage at a certain level corresponding to the image through a TFT 3 into each pixel, and maintains the voltage level until the next frame is written. The voltage of the signal C is variable between the ON voltage and the OFF voltage of a TFT 3 to be applied to the gate bus lines 1. A signal G is supplied to the spare lines 13 on both sides.
Generally, in both of the two exemplary active matrix substrates mentioned above, electrical insulation is maintained not only among the plurality of pixel electrodes 4 and among the plurality of TFTs 3, but also among the different kinds of bus lines, for example, among the gate bus lines 1 and the source bus lines 2, among the spare lines 13 and the source bus lines 2, and among the common lines 10 for storage capacitance and source bus lines 2. This substrate is provided with three-dimensional lines, and therefore a great number of crossings are formed between the crossing bus lines. An active matrix substrate is formed by a photolithography process or the like so that minute patterns may be formed thereon in the same manner as the production process for a semiconductor device. Accordingly, several kinds of defects such as an abnormal pattern are likely to occur because of dust and the like. Therefore, if a leakage current is generated at a crossing of bus lines owing to the presence of a pin-hole, etc., then the resulting display quality becomes inferior. In a display apparatus of this type, even a minor defect may be identified easily, and so such an apparatus is regarded as an inferior product. Therefore, it is very important to inspect the presence/absence of such defects, repair the defects, and eliminate such an inferior product for improving the production yield. In order to repair the defects, it is necessary to identify the positions of the defects and conduct an appropriate type of repair in accordance with the positions where the defects have occurred.
Japanese Laid-Open Patent Publication No. 63-123093 discloses a method for inspecting point defects of an active matrix liquid crystal panel, which are caused by a short-circuit between a gate electrode and a drain electrode and between a source electrode and a drain electrode of a TFT. The method includes a step of performing a display operation test. This patent publication describes that such an inspection method may be applied also in the case where a direct short circuit state is generated between a gate bus line and a pixel electrode or between a source bus line and a pixel electrode. This patent publication also describes that the short circuit generated between a gate electrode and a source electrode causes line defects where all the pixels connected to the gate bus lines and the source bus lines including the short-circuit portions can not operate any longer.
In the case where a leakage current is generated between a gate bus line 1 and a source bus line 2 because of a short circuit and the like, the display, conducted by the pixel electrodes arranged in a horizontal line and connected to the gate bus line 1 where the leakage current is generated and by the pixel electrodes arranged in a vertical line and connected to the source bus line 2 where the leakage current is generated, becomes inferior, so that line defects are displayed in a cross shape. Judging from the shape, the position where the leakage current is generated may be determined at the intersection of the cross, that is, the crossing of the gate bus line 1 and the source bus line 2 which are connected to the pixel electrode.
Japanese Laid-Open Patent Publication No. 2-64615 discloses a method for repairing the defects of an active matrix liquid crystal panel which are caused by the short circuit between a common line for a storage capacitance (in this case, an MOS capacitance) and a source bus line or between a common line and a gate bus line. For example, in the case where the MOS capacitance is of an N type, the difference in the display condition between the short-circuit source bus line and a normal source bus line may be recognized when a liquid crystal panel is operated. According to this patent publication, if the short-circuit source bus line is grounded, then the voltage level of the short-circuit common line alone is lowered to a ground level equal to or lower than the inverse threshold voltage. Therefore, the MOS capacitance formed by the common line becomes smaller than the original capacitance. As a result, the displayed portions along some horizontal line including the short-circuited common line become a little blacker than the other horizontal lines in a negative type gray-scale tone display condition where the pair of polarizing plates are disposed in parallel. Thus the short circuit portion may be determined at the crossing of the common line and a vertical line. Another repair method is described in this publication. In accordance with the method, both ends of the short-circuit portion of a source bus line or a common line for a storage capacitance are cut off with a laser beam, and then the floating signal line, both ends of which have been cut off, is connected through a peripheral bypass to external terminals.
A conventional active matrix liquid crystal panel, however, has a problem in that the generation of a leakage current at the crossing of a spare line 13 and a source bus line 2 may be recognized only after a driving circuit is mounted on the substrate. The reason for the generation of such a problem will be described below.
In the case where a source bus line 2 is disconnected, line defects occur in the floating portion of the disconnected source bus line 2. In this case, a spare line 13 is employed for repairing the line defects by connecting the crossing of the disconnected source bus line 2 and the spare line 13 with a laser beam and by supplying a signal to both ends of the source bus line 2. In order to confirm whether the repair is accomplished or not, the same signal as that supplied to the source bus line 2 is supplied to the spare line 13, and then it is inspected whether the source bus line 2 may be operated in the same way as the other normal source bus lines 2 or not. Accordingly, even if another leakage current is generated at any other crossing of the spare line 13 and the source bus line 2 other than the repaired portion for which the spare line 13 is provided, no variation occurs in the signal transmitted through the source bus line 2 where another leakage current is generated. Thus there is no change in the display quality, thereby making it impossible to recognize the leakage current.
Because of the above-mentioned problems, the generation of the leakage current between the spare line 13 and the source bus line 2 can be recognized only after a driving circuit is mounted on the substrate. So the leakage current is conventionally inspected during a mounting step for producing a module and therefore a defective apparatus can not be screened until then. Accordingly, such a problem causes a secondary problem of a decrease in the production yield during the mounting step for producing a module.
On the other hand, another problem occurs in that what is likely to become a defect in the future can not be identified. That is to say, if any insulated portion, the insulation properties of which have been degraded because of the existence of pin holes or some residual film, exists anywhere between the insulated electrodes, e.g. a crossing of bus lines, then the insulation properties may be further degraded owing to the stress caused during long-term use thereby generating some defective parts. According to a conventional inspection method, a driving voltage in a level commonly used for a display apparatus is employed. It is true that inferior portions already existing at the time of the inspection may be inspected, but the portions having degraded insulation properties which are likely to become defective parts because of stress after long-term use can not be inspected. Therefore, such an apparatus lacks in reliability.